Faster, silicon-based technologies are driving new applications such as wireless LAN, point-to-multipoint distribution, and broadband data services such as gigabit per second (Gb/s) fibre-based systems. Shrinking transistor dimensions on-chip have increased gain-bandwidth frequencies beyond 200 GHz, however, it is widely recognized that passive components now limit the speed and frequency range of circuits at RF and higher operating frequencies. Energy coupled to the semiconducting substrate in silicon technologies via passive components is quickly dissipated. This constrains the gain and bandwidth of monolithic circuits. Also, at frequencies where wavelengths are shorter than 10 mm (i.e., millimeter-wave or above 12 GHz for signals on a silicon chip) the signal delay over interconnections must be factored into a typical integrated circuit design.
High performance transmission lines and components thereof are desirable for interconnections, impedance matching, resonant and distributed circuits, and for implementing devices such as signal splitters, hybrid couplers, inductors, and balun transformers.
One exemplary prior art device is shown in FIG. 1, a perspective view of a portion of a microstrip transmission line fabricated in silicon technology indicated generally by the numeral 15. A single top conductor 16 is disposed on an insulator 17 (typically silicon dioxide), a semiconductor 18 (silicon substrate) and attached to a metal ground plane 19. This forms a metal-insulator-semiconductor-metal (MISM) sandwich of insulating dielectric and silicon layers between the ground plane 19 and top-conductor metal 16. While this transmission line is simple, it suffers from high energy dissipation into the semiconducting silicon material resulting in pulse dispersion and attenuation of the signal being transferred that increases with increasing frequency.
Another exemplary prior art device is shown in FIG. 2, a perspective view of a portion of a coplanar waveguide (CPW) on-chip transmission line indicated generally by the numeral 20. (As will be described, FIGS. 1, 2 and 3 are directed to the prior art and are so labeled). The coplanar waveguide 20 includes 3 coplanar conductors, a center conductor 22 with two adjacent ground strips (conductors) 24, 26 in the same plane as the center conductor 22, all disposed on a substrate 28. For a semi-conductive substrate (e.g., silicon), an insulator 27 (e.g., silicon dioxide) is disposed between the coplanar conductors 22, 24, 26 and the substrate 28. If the substrate 28 is made of a semi-insulating material (e.g., gallium arsenide) or insulating material (e.g., alumina), the insulator 27 is not required. The coplanar conductors 22, 24, 26 tend to confine the electric field to the gap between conductors 22, 24, 26. However, current crowding along the conductor edges 22, 24, 26, at higher frequencies causes higher dissipation than for microstrip lines.
A third exemplary prior art device is shown in FIG. 3, a perspective view of a portion of a simple microstrip transmission line (i.e., metal-insulator-metal, or MIM) indicated generally by the numeral 30. The microstrip line 30 includes a strip conductor 32 disposed over an intermetal dielectric 33 and a ground sheet 34, followed by an underlying substrate 35.
The microstrip line 30 includes two layers of metal and therefore has a relatively large capacitance per unit length since the intermetal dielectric is generally a few microns thick. Also, the ground sheet must be slotted to relieve stress between the metal film and dielectric for metal areas larger than about 30×30 m2 in typical VLSI (very large scale integration) interconnect metal schemes. Leakage of the electromagnetic fields via the slots to the underlying semiconductor, and dissipation due to current flow in the metals cause losses resulting in decreased performance. These losses are, however, substantially lower than for the MISM or CPW transmission lines.